From a2c1274a39d87abe6da9fa7cae9dd8e7dc566ea6 Mon Sep 17 00:00:00 2001 From: Graham Nelson Date: Sat, 22 Apr 2023 23:14:53 +0100 Subject: [PATCH] Fix for Jira bug I7-2328 --- docs/final-module/4-i6c2.html | 21 +++++++++++++----- inform7/Figures/timings-diagnostics.txt | 23 ++++++++++---------- inter/final-module/Chapter 4/Inform 6 Code.w | 20 ++++++++++++----- 3 files changed, 40 insertions(+), 24 deletions(-) diff --git a/docs/final-module/4-i6c2.html b/docs/final-module/4-i6c2.html index 335f30773..8c1b38c24 100644 --- a/docs/final-module/4-i6c2.html +++ b/docs/final-module/4-i6c2.html @@ -206,6 +206,15 @@ or if the Gestalt said that the VM didn't support this after all, no harm would be done except for a slight slowdown.

+

At the suggestion of Adrian Welcker, the code below uses the new accelerated +function numbers 8 to 13 in place of the previously valid 2 to 7, which are new +in Glulx 3.1.3. This is a trade-off: it means they behave correctly if the +Inform 6 constant NUM_ATTR_BYTES is altered — in effect, it's getting around +a bug in the previous Glulx spec — but on the other hand, these accelerated +functions do not exist in earlier Glulx implementations. However, takeup of +3.1.3 has been swift. (See Jira bug I7-2328 and I7-1162.) +

+

Inject code at the top of FINAL_CODE_STARTUP_R2.7 =

@@ -226,12 +235,12 @@ be done except for a slight slowdown. WRITE("addr = #cpv__start;\n"); WRITE("@accelparam 8 addr;\n"); WRITE("@accelfunc 1 Z__Region;\n"); - WRITE("@accelfunc 2 CP__Tab;\n"); - WRITE("@accelfunc 3 RA__Pr;\n"); - WRITE("@accelfunc 4 RL__Pr;\n"); - WRITE("@accelfunc 5 OC__Cl;\n"); - WRITE("@accelfunc 6 RV__Pr;\n"); - WRITE("@accelfunc 7 OP__Pr;\n"); + WRITE("@accelfunc 8 CP__Tab;\n"); + WRITE("@accelfunc 9 RA__Pr;\n"); + WRITE("@accelfunc 10 RL__Pr;\n"); + WRITE("@accelfunc 11 OC__Cl;\n"); + WRITE("@accelfunc 12 RV__Pr;\n"); + WRITE("@accelfunc 13 OP__Pr;\n"); WRITE("#endif;\n"); WRITE("rfalse;\n"); diff --git a/inform7/Figures/timings-diagnostics.txt b/inform7/Figures/timings-diagnostics.txt index c26f852ca..22dff5f8d 100644 --- a/inform7/Figures/timings-diagnostics.txt +++ b/inform7/Figures/timings-diagnostics.txt @@ -1,7 +1,7 @@ 100.0% in inform7 run - 70.5% in compilation to Inter - 50.3% in //Sequence::undertake_queued_tasks// - 4.6% in //MajorNodes::pre_pass// + 70.0% in compilation to Inter + 49.4% in //Sequence::undertake_queued_tasks// + 4.9% in //MajorNodes::pre_pass// 3.3% in //MajorNodes::pass_1// 1.7% in //ImperativeDefinitions::assess_all// 1.5% in //RTPhrasebook::compile_entries// @@ -9,25 +9,24 @@ 1.1% in //Sequence::lint_inter// 0.5% in //MajorNodes::pass_2// 0.5% in //Sequence::undertake_queued_tasks// + 0.5% in //Sequence::undertake_queued_tasks// 0.5% in //World::stage_V// 0.3% in //ImperativeDefinitions::compile_first_block// - 0.3% in //Sequence::undertake_queued_tasks// - 0.1% in //Closures::compile_closures// 0.1% in //CompletionModule::compile// 0.1% in //InferenceSubjects::emit_all// 0.1% in //RTKindConstructors::compile_permissions// 0.1% in //Task::make_built_in_kind_constructors// - 2.8% not specifically accounted for - 26.1% in running Inter pipeline - 9.7% in step 14/15: generate inform6 -> auto.inf - 5.8% in step 5/15: load-binary-kits - 5.4% in step 6/15: make-synoptic-module + 2.9% not specifically accounted for + 26.3% in running Inter pipeline + 10.2% in step 14/15: generate inform6 -> auto.inf + 5.7% in step 5/15: load-binary-kits + 5.5% in step 6/15: make-synoptic-module 1.7% in step 9/15: make-identifiers-unique 0.3% in step 12/15: eliminate-redundant-operations 0.3% in step 4/15: compile-splats 0.3% in step 7/15: shorten-wiring 0.3% in step 8/15: detect-indirect-calls 0.1% in step 11/15: eliminate-redundant-labels - 1.5% not specifically accounted for - 2.9% in supervisor + 1.3% not specifically accounted for + 3.1% in supervisor 0.4% not specifically accounted for diff --git a/inter/final-module/Chapter 4/Inform 6 Code.w b/inter/final-module/Chapter 4/Inform 6 Code.w index 839d089d0..fe2727130 100644 --- a/inter/final-module/Chapter 4/Inform 6 Code.w +++ b/inter/final-module/Chapter 4/Inform 6 Code.w @@ -117,6 +117,14 @@ reimplements some of the veneer functions in "hardware". If it weren't here, or if the Gestalt said that the VM didn't support this after all, no harm would be done except for a slight slowdown. +At the suggestion of Adrian Welcker, the code below uses the new accelerated +function numbers 8 to 13 in place of the previously valid 2 to 7, which are new +in Glulx 3.1.3. This is a trade-off: it means they behave correctly if the +Inform 6 constant |NUM_ATTR_BYTES| is altered -- in effect, it's getting around +a bug in the previous Glulx spec -- but on the other hand, these accelerated +functions do not exist in earlier Glulx implementations. However, takeup of +3.1.3 has been swift. (See Jira bug I7-2328 and I7-1162.) + @ = WRITE("#ifdef TARGET_GLULX;\n"); WRITE("@gestalt 9 0 res;\n"); @@ -134,12 +142,12 @@ be done except for a slight slowdown. WRITE("addr = #cpv__start;\n"); WRITE("@accelparam 8 addr;\n"); WRITE("@accelfunc 1 Z__Region;\n"); - WRITE("@accelfunc 2 CP__Tab;\n"); - WRITE("@accelfunc 3 RA__Pr;\n"); - WRITE("@accelfunc 4 RL__Pr;\n"); - WRITE("@accelfunc 5 OC__Cl;\n"); - WRITE("@accelfunc 6 RV__Pr;\n"); - WRITE("@accelfunc 7 OP__Pr;\n"); + WRITE("@accelfunc 8 CP__Tab;\n"); + WRITE("@accelfunc 9 RA__Pr;\n"); + WRITE("@accelfunc 10 RL__Pr;\n"); + WRITE("@accelfunc 11 OC__Cl;\n"); + WRITE("@accelfunc 12 RV__Pr;\n"); + WRITE("@accelfunc 13 OP__Pr;\n"); WRITE("#endif;\n"); WRITE("rfalse;\n");