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Fix for Jira bug I7-2328
This commit is contained in:
Graham Nelson
parent
88a99eb932
commit
a2c1274a39
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@ -206,6 +206,15 @@ or if the Gestalt said that the VM didn't support this after all, no harm would
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be done except for a slight slowdown.
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</p>
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<p class="commentary">At the suggestion of Adrian Welcker, the code below uses the new accelerated
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function numbers 8 to 13 in place of the previously valid 2 to 7, which are new
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in Glulx 3.1.3. This is a trade-off: it means they behave correctly if the
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Inform 6 constant <span class="extract"><span class="extract-syntax">NUM_ATTR_BYTES</span></span> is altered — in effect, it's getting around
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a bug in the previous Glulx spec — but on the other hand, these accelerated
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functions do not exist in earlier Glulx implementations. However, takeup of
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3.1.3 has been swift. (See Jira bug I7-2328 and I7-1162.)
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</p>
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<p class="commentary"><span class="named-paragraph-container code-font"><span class="named-paragraph-defn">Inject code at the top of FINAL_CODE_STARTUP_R</span><span class="named-paragraph-number">2.7</span></span><span class="comment-syntax"> =</span>
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</p>
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@ -226,12 +235,12 @@ be done except for a slight slowdown.
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<span class="plain-syntax"> </span><span class="identifier-syntax">WRITE</span><span class="plain-syntax">(</span><span class="string-syntax">"addr = #cpv__start;\n"</span><span class="plain-syntax">);</span>
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<span class="plain-syntax"> </span><span class="identifier-syntax">WRITE</span><span class="plain-syntax">(</span><span class="string-syntax">"@accelparam 8 addr;\n"</span><span class="plain-syntax">);</span>
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<span class="plain-syntax"> </span><span class="identifier-syntax">WRITE</span><span class="plain-syntax">(</span><span class="string-syntax">"@accelfunc 1 Z__Region;\n"</span><span class="plain-syntax">);</span>
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<span class="plain-syntax"> </span><span class="identifier-syntax">WRITE</span><span class="plain-syntax">(</span><span class="string-syntax">"@accelfunc 2 CP__Tab;\n"</span><span class="plain-syntax">);</span>
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<span class="plain-syntax"> </span><span class="identifier-syntax">WRITE</span><span class="plain-syntax">(</span><span class="string-syntax">"@accelfunc 3 RA__Pr;\n"</span><span class="plain-syntax">);</span>
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<span class="plain-syntax"> </span><span class="identifier-syntax">WRITE</span><span class="plain-syntax">(</span><span class="string-syntax">"@accelfunc 4 RL__Pr;\n"</span><span class="plain-syntax">);</span>
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<span class="plain-syntax"> </span><span class="identifier-syntax">WRITE</span><span class="plain-syntax">(</span><span class="string-syntax">"@accelfunc 5 OC__Cl;\n"</span><span class="plain-syntax">);</span>
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<span class="plain-syntax"> </span><span class="identifier-syntax">WRITE</span><span class="plain-syntax">(</span><span class="string-syntax">"@accelfunc 6 RV__Pr;\n"</span><span class="plain-syntax">);</span>
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<span class="plain-syntax"> </span><span class="identifier-syntax">WRITE</span><span class="plain-syntax">(</span><span class="string-syntax">"@accelfunc 7 OP__Pr;\n"</span><span class="plain-syntax">);</span>
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<span class="plain-syntax"> </span><span class="identifier-syntax">WRITE</span><span class="plain-syntax">(</span><span class="string-syntax">"@accelfunc 8 CP__Tab;\n"</span><span class="plain-syntax">);</span>
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<span class="plain-syntax"> </span><span class="identifier-syntax">WRITE</span><span class="plain-syntax">(</span><span class="string-syntax">"@accelfunc 9 RA__Pr;\n"</span><span class="plain-syntax">);</span>
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<span class="plain-syntax"> </span><span class="identifier-syntax">WRITE</span><span class="plain-syntax">(</span><span class="string-syntax">"@accelfunc 10 RL__Pr;\n"</span><span class="plain-syntax">);</span>
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<span class="plain-syntax"> </span><span class="identifier-syntax">WRITE</span><span class="plain-syntax">(</span><span class="string-syntax">"@accelfunc 11 OC__Cl;\n"</span><span class="plain-syntax">);</span>
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<span class="plain-syntax"> </span><span class="identifier-syntax">WRITE</span><span class="plain-syntax">(</span><span class="string-syntax">"@accelfunc 12 RV__Pr;\n"</span><span class="plain-syntax">);</span>
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<span class="plain-syntax"> </span><span class="identifier-syntax">WRITE</span><span class="plain-syntax">(</span><span class="string-syntax">"@accelfunc 13 OP__Pr;\n"</span><span class="plain-syntax">);</span>
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<span class="plain-syntax"> </span><span class="identifier-syntax">WRITE</span><span class="plain-syntax">(</span><span class="string-syntax">"#endif;\n"</span><span class="plain-syntax">);</span>
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<span class="plain-syntax"> </span><span class="identifier-syntax">WRITE</span><span class="plain-syntax">(</span><span class="string-syntax">"rfalse;\n"</span><span class="plain-syntax">);</span>
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</pre>
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@ -1,7 +1,7 @@
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100.0% in inform7 run
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70.5% in compilation to Inter
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50.3% in //Sequence::undertake_queued_tasks//
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4.6% in //MajorNodes::pre_pass//
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70.0% in compilation to Inter
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49.4% in //Sequence::undertake_queued_tasks//
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4.9% in //MajorNodes::pre_pass//
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3.3% in //MajorNodes::pass_1//
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1.7% in //ImperativeDefinitions::assess_all//
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1.5% in //RTPhrasebook::compile_entries//
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@ -9,25 +9,24 @@
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1.1% in //Sequence::lint_inter//
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0.5% in //MajorNodes::pass_2//
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0.5% in //Sequence::undertake_queued_tasks//
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0.5% in //Sequence::undertake_queued_tasks//
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0.5% in //World::stage_V//
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0.3% in //ImperativeDefinitions::compile_first_block//
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0.3% in //Sequence::undertake_queued_tasks//
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0.1% in //Closures::compile_closures//
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0.1% in //CompletionModule::compile//
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0.1% in //InferenceSubjects::emit_all//
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0.1% in //RTKindConstructors::compile_permissions//
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0.1% in //Task::make_built_in_kind_constructors//
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2.8% not specifically accounted for
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26.1% in running Inter pipeline
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9.7% in step 14/15: generate inform6 -> auto.inf
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5.8% in step 5/15: load-binary-kits
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5.4% in step 6/15: make-synoptic-module
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2.9% not specifically accounted for
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26.3% in running Inter pipeline
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10.2% in step 14/15: generate inform6 -> auto.inf
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5.7% in step 5/15: load-binary-kits
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5.5% in step 6/15: make-synoptic-module
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1.7% in step 9/15: make-identifiers-unique
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0.3% in step 12/15: eliminate-redundant-operations
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0.3% in step 4/15: compile-splats
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0.3% in step 7/15: shorten-wiring
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0.3% in step 8/15: detect-indirect-calls
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0.1% in step 11/15: eliminate-redundant-labels
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1.5% not specifically accounted for
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2.9% in supervisor
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1.3% not specifically accounted for
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3.1% in supervisor
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0.4% not specifically accounted for
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@ -117,6 +117,14 @@ reimplements some of the veneer functions in "hardware". If it weren't here,
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or if the Gestalt said that the VM didn't support this after all, no harm would
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be done except for a slight slowdown.
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At the suggestion of Adrian Welcker, the code below uses the new accelerated
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function numbers 8 to 13 in place of the previously valid 2 to 7, which are new
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in Glulx 3.1.3. This is a trade-off: it means they behave correctly if the
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Inform 6 constant |NUM_ATTR_BYTES| is altered -- in effect, it's getting around
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a bug in the previous Glulx spec -- but on the other hand, these accelerated
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functions do not exist in earlier Glulx implementations. However, takeup of
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3.1.3 has been swift. (See Jira bug I7-2328 and I7-1162.)
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@<Inject code at the top of FINAL_CODE_STARTUP_R@> =
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WRITE("#ifdef TARGET_GLULX;\n");
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WRITE("@gestalt 9 0 res;\n");
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@ -134,12 +142,12 @@ be done except for a slight slowdown.
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WRITE("addr = #cpv__start;\n");
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WRITE("@accelparam 8 addr;\n");
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WRITE("@accelfunc 1 Z__Region;\n");
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WRITE("@accelfunc 2 CP__Tab;\n");
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WRITE("@accelfunc 3 RA__Pr;\n");
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WRITE("@accelfunc 4 RL__Pr;\n");
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WRITE("@accelfunc 5 OC__Cl;\n");
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WRITE("@accelfunc 6 RV__Pr;\n");
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WRITE("@accelfunc 7 OP__Pr;\n");
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WRITE("@accelfunc 8 CP__Tab;\n");
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WRITE("@accelfunc 9 RA__Pr;\n");
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WRITE("@accelfunc 10 RL__Pr;\n");
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WRITE("@accelfunc 11 OC__Cl;\n");
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WRITE("@accelfunc 12 RV__Pr;\n");
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WRITE("@accelfunc 13 OP__Pr;\n");
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WRITE("#endif;\n");
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WRITE("rfalse;\n");
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